why nand gate only used as driving cell and load on input and output ports?

[gangadharn]

Hi,

Today, one of friend ask me below question.
why nand gate only used as driving cell and load on input and output ports?

As per my understanding : There is no hard rule of using only nand gate. I have practice of using Buffer/AND/CTB cells as driving cell and set_load. I think why nand cells? answer is this is one of the slowest cells (Faster compare to Nor of same size). Other then this I don't see anything.

Let me your views on this question.

Gangadhar Naik

 

[saurabhr8here]

What specific application are you talking about? When is the NAND gate used as driving cell and load on input/output ports? Is this during standard cell characterization?

 

[gangadharn]

These command are SDC's commands get used in setting up environment for Static Timing Analysis and Physical design. Application of design you can consider generic.