Well the clock description is also dependant of the design. If you have all clocks elements on the same edge, you don't care of the duty cycle.
It is always good to indicate a realistic rise & fall time, which will reduce the frequency.
In your case, it seems you have a lot of margin, the question is did you increased the area/power of your design by "over" constraining the clock frequency? Did you tried to draft a plot clock frequency versus area to check where is the break point?, and by this way you will know at which frequency the area is really impacted and then you add more margin with a "reduced" area impact.