There are too many power supply in one chip now due to the complication of the chip designed today. Usually, there is not only one core in a complicated chip, so we need different power to run it. For logic circuits, we don't care for the voltage levels if they can work well. as tutx said "For logic level:
logic '0' : from 0 volt to ~30% volt max.
logic '1': from 60% volt max to volt max. "
it depends on the interface that connect with other chips.
In general, chip is only pure 2.5V or 3.3V. But sometimes, for system reqirement, we have to design as dual power chip. That is IO is 3.3V and CORE is 2.5V.
depends on interfaces of the ASIC, voltages will be provided... say 2.5 v interface for diff signals, 3.3V interface for other ICS,, in general keeping low core voltage (1.2 or 1.8) is to reduce power consumption of the device....so that internal logic consumes less power.
3v3 is for IO pad power supply, because chip should be able to communicate
with many existed 3v3 chips.
2V5 is for core logic power supply.
tybhsl said:
Here I've got a chip which has power suply pin VDD of 3.3v and 2 .5v at the same time. What does it needs both of them? Is it that they will used to directly drive the drain and source of the EFTs (Field Effect Tube)respectively in a CMOS ASIC chip? And what voltage will logic "1" or "0" will be represented as? Tanks a lot!