active low logic pull down
reset signals are usually active low because you
frequently need them to be well behaved during power-on and power-off
events, when the dc supplies for the circuit are not stable. While it may
be difficult (depending on the logic families used) to generate a good
low-active reset during a power transient, you can see that it would be
impossible to generate a good high-active reset when the power supplies were
below the high logic threshold