Why bias current in folded cascode is higher than in simple?

[Analog_IC]

Basic Question

Q2. Total bias current in folded cascode case is required higher than in simple cascode stage to achieve same performance. why???

 

[whaler]

Re: Basic Question

I think it is because there are two more current sources.

 

[lastdance]

Re: Basic Question

which transistor r u referring to?
could u post the circuit, albeit conventional, on the site next time so that it's easier, we do not have to guess..

 

[ambreesh]

Re: Basic Question

In telecopic cascode the same bias current flows through your current mirror loads as through your tail current source/sink. The bias current for common source and common gate stage is same. You need to bias the common gate transistors in folded cascode from different current source. Thus you find increse in current consumption.
Please read Allen Holberg he gives good explanation on how much current to bisa what and reasons also

 

[wany]

Re: Basic Question

you can read Design of Analog CMOS Integrated jCircuits of Razavi .charpt 9

 

[name_n16]

Re: Basic Question

Q2. Total bias current in folded cascode case is required higher than in simple cascode stage to achieve same performance. why???

It's simple. Think of it in this way. Say you have a folded cascode with PMOS input pair. Let the bias current for the input pair be Ibias. Then the current from input pair has to be sinked by NMOS current source at the folding node. Hence the NMOS tail current source has to be atleast equal to the current flowing through the input pair.

Now the maximum current that can flow through the input pair is the full Ibias under full input swing.

This means that the tail NMOS current source has to be atleast equal to Ibias. Now to satisfy KCL at folding node, the current through the active load has to be Ibias/2. Because another Ibias/2 will flow from the input pair.

I hope this helps.