Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
sc cmfb will generate great equivalent resistance, so that it will not affect the output stage gain.
Also by sc cmfb, other voltage than vcm can be feedback to the op, so that one cmfb op can be saved to enhance the cmfb gbw.
The most fundermental reason is that: ADC is a discrete time block, it has clock, so sc cmfb can be realized without defect.