Why 5V for Std. TTL and 15V for CMOS as VCC ?

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Why 5V for Std. TTL (ex: 7400) and 15V for CMOS (ex: CD4001) as VCC. What are the factors which actually determines the supply voltage for each familes.

Any idea ?

Regards
Itp
 

Hi

One of the reason is noise immunity. Another one is power consumption.

Due to the high input impedance of CMOS circuits, their noise sensitivity is very high, therefore, a large gap between vil (voltage input low) and vih (voltage input high) gives a large noise marging. On another side, their power consumption is low. So high value of power supply voltage was possible. A good compromise between noise immunity and low power consumption was 15V for the value of the power supply.

TTL circuits have a much lower input impedance and therefore a lower noise sensitivity. But it consume much more current than CMOS. So the compromise was 5V for the value of the power supply.
 

The TTL are desined to work with a standart 4.5 volt Cell then 5V but the cmos can work in a wide range of power voltage -usualy from 3 to 15 volts this is due the higher Vgs of MOS FETs but the lower Vcc -the lower the max frequency of CMOS-and the switching speed also!!
 

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