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who is analog IC designer in the USA or Europe?

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printer

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who is analog IC engineer in the USA or Europe?

i want to make friends with these designers, i am also a analog IC designer,

but i am in China.
 

etlouro

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tyr chip ideia in Portugal. :D
 

bastos4321

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to etlouro.

You should not put company names here ..... :evil:
 

okguy

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I am european. If you are analog designer in China, I would like to talk with you, to get more contacts in China.

pm 2 me

OkGuy ?
 

mesfet

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Hi all,

I'm just a newbie in rfic design. Can anyone share with us the experience in designing rfic? For eg, tutorials on using the messy cadence, pitfalls that should be avoided in design, layout techniques......etc.

I'm now encountering a problem in my design. Any suggtestions are welcome. I've designed a single stage amplifier with 0.6um technology of AMS. Inductor are designed by asitic, the simulated and measured data does match well. Both input and output matching are off-chip and are load-pulled for maxium gain. But the problem is that gain of the amplifier drop from 14dB to only 5dB!! My conclusion is that there is any ground in the cmos chip. There is an inductance between ground of my cmos chip and the "true" ground of my PCB board, this inductive feedback lower gain of my amplifier. Am I correct? Anyone have suggestions on raising gain of my amplifier? I've tried 3 bond wires in parallel but not much benefit is gained.
 

BigBoss

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mesfet said:
Hi all,

I'm just a newbie in rfic design. Can anyone share with us the experience in designing rfic? For eg, tutorials on using the messy cadence, pitfalls that should be avoided in design, layout techniques......etc.

I'm now encountering a problem in my design. Any suggtestions are welcome. I've designed a single stage amplifier with 0.6um technology of AMS. Inductor are designed by asitic, the simulated and measured data does match well. Both input and output matching are off-chip and are load-pulled for maxium gain. But the problem is that gain of the amplifier drop from 14dB to only 5dB!! My conclusion is that there is any ground in the cmos chip. There is an inductance between ground of my cmos chip and the "true" ground of my PCB board, this inductive feedback lower gain of my amplifier. Am I correct? Anyone have suggestions on raising gain of my amplifier? I've tried 3 bond wires in parallel but not much benefit is gained.
You should not tell your story as . Because this is not a talent of Red Hat Girl . Instead of this , you should prepare a document that explains the evolution of the story and other datas.. etc. And then we can be helpful to you.
For the others , every technolgy has some private specifications and therefore there is no unique solution to common problems. But you're right
modelization of a Inductor is the most difficult thing in VLSI area. For example , ASITIC sw doesn't give very accurate results on our technology but Momentum gives more accurate. Interstingly , asitic gives more accurate results in other derivative tech. of us.
It means that , exprience is the best way to learn VLSI design even you have been read tons of documents.

This is valid for every kind of VLSI design. You have to find the truth by cutting and trying. :idea:
Good Luck
 

Jackal

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Hi friends!

I planning to learn designing of Rfic's and digital Asic's (not a Fpga).

May be you are help me with software and documents about designing analog and digital asics ?
If yes please pm me or send to my Icq.

With the respect, Alexander.
 

costox

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I'm a RFIC/MMIC designer. Is it analog enough for you :p
 

costox

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I assume those who read this topics are analog designer (MMIC, RFIC in particular).

I suggest you go to yahoo groups and search for RFIC or MMIC groups.

There are 2 of those and I think it's a good place to share info (jobs, info, ...).

If someone knows of other groups, please share.

CHeers
 

silicon

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8O ...There are so many analog IC designers in this forum.

I'm a analog designer too, but in Taiwan. It will be great if we can have a eboard or a news group to disscuss technical probelm.

Silicon.... :?:
 

rfsystem

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Hi mesfet,

at what freq. a bound wire get a j50 ohm ?

There is a solution! Put a ground wire for DC and a series cap on a second bond wire. So you teleport :) the board ground into the chip!
 

costox

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I was IC test and designer in US up to last year.

I know a friend doing MMIC design in China right now... Big company.
 

arbalez

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i'm still a student and i want to be an analog ic designer someday.
 

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