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who have benchmark hspice in Xeon VS K8

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andy2000a

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Hi
I find soem hardware test report on techReport
**broken link removed**

and other site is
https://www.anandtech.com/IT/showdoc.aspx?i=1935&p=9

from website test , K8 is fast than Xeon much more
but it base on general application , have anyone use Hspice (linux or windows)
run demo PLL circuit (and enlarge simulation time becase demo ckt is too small , I think we need a long time simulation for benchmark it)

K8 and Xeon which fast in 2 CPU ?? many people told me K8 fast
but who can give me real test report ??

I use P4 simulation hspice .. it is very slow ...
I want to use new CPU for my simulation ..
 

I think the second benchmark is a database app where the two independend memory access channel of the operons dual do it better. For circuit simulation I observe less memory effect. The speed should scale with the Whetstone.

So either a 2.5GHz overclocked XP or an 2.4GHz Athlon64 would be the winners over the P4. But a 2GHz XP would give you very good price/performance ratio.
 

I have seen benchmark results and K8 is faster for equivalent category, running not only spice but also Cadence LDV, Cadence Encounter, Design Compiler...
 

find eetop have benchmark

pll.sp .tran .tran 0.01u 從 2500u -> 25000us
CPU clock OS sim-time
----------------------------
Intel Pentium4 3GHz RH8 1131s
AMD opteron 2.8G RHEL4 676s
AMD opteron252 2.6G RHEL4 727s
Intel ex4400 2.4G centOS 4.5 508.2sec
Intel I7 920 2.6G o 4G cent 4.5 64bit 238.31s
Amd 6core 1055T 2.8GHZ RHEL4 555.59s
Intel T5600 1.83G RHEL4 1012.9s

1055T = new K8


== whole test example ==

$ transistor level phase locked loop
.option post probe
$
$ wideband FM example, Grebene gives:
$ f0=1meg kf=250kHz/V
$ kd=0.1 V/rad
$ R=10K C=1000p
$ f_lock = kf*kd*pi/2 = 39kHz, v_lock = kd*pi/2 = 0.157
$ f_capture/f_lock ~= 1/sqrt(2*pi*R*C*f_lock)
$ = 0.63, v_capture ~= 0.100

.tran 0.01u 25000u
.option runlvl=5
.option delmax=0.01u
.probe v_in=v(inc,0) v_out=v(out,outb)
.probe v(in) v(osc) v(mout) v(out) v(e)

vcc vcc 0 6
vee vee 0 -6

$ input
vin inc 0 pwl 0u,-0.2 500u,0.2
xin inc 0 in inb vco f0=1meg kf=125k phi=0 out_off=0 out_amp=0.3

$ vco
xvco1 e eb osc oscb 0 vee vco1
.ic v(osc)=-1.4 v(oscb)=-0.7

$ phase detector
xpd1 in inb osc oscb mout moutb vcc vee pd1

$ filter
rf mout e 10k
cf e 0 1000p
rfb moutb eb 10k
cfb eb 0 1000p

$ final output
rout out e 100k
cout out 0 100p
routb outb eb 100k
coutb outb 0 100p


.subckt vco in inb out outb f0=100k kf=50k phi=0.0 out_off=0.0 out_amp=1.0
gs 0 s poly(2) c 0 in inb 0 '6.2832e-9*f0' 0 0 '6.2832e-9*kf'
gc c 0 poly(2) s 0 in inb 0 '6.2832e-9*f0' 0 0 '6.2832e-9*kf'
cs s 0 1e-9
cc c 0 1e-9
e1 s_clip 0 pwl(1) s 0 -0.1,-0.1 0.1,0.1
e out 0 s_clip 0 out_off '10*out_amp'
eb outb 0 s_clip 0 out_off '-10*out_amp'
.ic v(s)='sin(phi)' v(c)='cos(phi)'
.ends

.subckt vco1 in inb e7 e8 vcc vee vco_cap=228.5p
qout vcc vcc b7 npn1
qoutb vcc vcc b8 npn1
rb vcc c0 5k $ 1ma
q0 c0 b0 vee npn1
q7 vcc b7 e7 npn1
r4 vcc b7 1k
i7 e7 0 1m
q8 vcc b8 e8 npn1
r5 vcc b8 1k
i8 e8 0 1m
q9 b7 e8 e9 npn1
q10 b8 e7 e10 npn1
c0 e9 e10 vco_cap
q11 e9 in 2 npn1
q12 e10 in 2 npn1
q15 2 c0 b0 npn1
q16 3 c0 b0 npn1
rx 2 3 8k
q13 vcc inb 3 npn1
q14 vcc inb 3 npn1
rt b0 vee 350
.ends


.model npn1 npn
+ eg=1.1 af=1 xcjc=0.95 subs=1
+ cjs=0 tf=5p
+ tr=500p cje=0.2p cjc=0.2p fc=0.8
+ vje=0.8 vjc=0.8 mje=0.33 mjc=0.33
+ rb=0 rbm=0 irb=10u
+ is=5e-15 ise=1.5e-14 isc=0
+ vaf=150 bf=100 ikf=20m
+ var=30 br=5 ikr=15m
+ rc=0 re=0
+ nf=1 ne=1.5 nc=1.2
+ tbf1=8e-03


.subckt pd1 in inb in2 in2b out outb vcc vee
rl vcc n1 1k
rlb vcc n1b 1k
q3 n1 in c1 npn1
q4 n1b inb c1 npn1
q5 n1 inb c2 npn1
q6 n1b in c2 npn1
q1 c1 in2 e npn1
q2 c2 in2b e npn1
ie e 0 0.5m
c1 n1 0 1p
c1b n1b 0 1p
q7 vcc n1 e7 npn1
q8 vcc n1b e8 npn1
r1 e7 out 625
r2 out vee 300
r1b e8 outb 625
r2b outb vee 300
.ends

.end
 

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