I was trying to make a 4 bit gray to binary code converter using while loop. It was giving me logical error in the waveform. During the first 2-3 clock pulses, the output bits were uninitialized. What can be the reason for it pls.
You declared temp as a signal which will be updated after one delta cycle unlike variable .so declare temp as variable inside process and assign to output inside process.like this
Code:
architecture Behavioral of gray2b is
begin
process(g)
variable i : integer ;
variable temp : std_logic_vector(3 downto 0);
begin
i:=3;
temp(3) := g(3);
while (i > 0) loop
temp(i-1) := temp(i) xor g(i-1);
i:=i-1;
end loop;
b<= temp;
end process;
end Behavioral;
Your description of the problem is a little muddled. You talk about there being 3 clock pulses with unitialised signals, but I see no clocks in the design, and your code is not synchronous.
Also, although the code you have would be ok for synthesis, while loops are not recommended - you can only use them when the loop iterations are constant (as is the case here). You would be much better off sticking to for loops.