Which topic should I choose?(about ADC/DAC)

[kennyg]

current steering dac thesis

Hello everyone,
I am a freshman in AIC/MSIC field.
My advisor professor gave me a list.
There are so different architectures about ADC/DAC.
I don't know which one is better for my career,thesis,etc.
Please give me some suggestions.
Thanks in advance.

List:
-----------------------------------------------------------------
1.Low-voltage(1.2V)10-bit pipelined ADC
2.High-speed Low-power 6-bit ADC
3.High-speed Current-steering DAC
4.Low-jitter Digital PLL/DLL Clock generator
5.System in package and capacitor matching experiment
6.Temperature Sensor and Fingerprint Sensor

-----------------------------------------------------------------

 

[ppenday]

choose high speed current steering DAC

 

[mists]

myabe you can learn more from pipeline adc or pll/dll.

 

[kennyg]

It seems that ADC is more difficult than DAC
and current-steering DAC is just part of some
ADC architectures.

I mean,
if I choose a difficult one,maybe it will take me more time to finish my thesis;
On the other hand,
If I choose a easy one,maybe it will do harm to my career.
Do I worry too much?

By the way,pipeline ADC seems to be the hottest
ADC architecture.

Am I right?

 

[jjohn]

Temperature Sensor and Fingerprint Sensor Has commercial implication ...

 

[rajivs1001]

pipe ADC is indeed the most used ADC, especially in sensor apllications.

However I feel any of ADC design should be good enough for you to get a good feel of analog design and thats to me is most important

 

[sachinagg77]

I would suggest the Current Steering DAC. The current steering DAC is not always a part of other ADC architectures. Designing high resolution C-DAC [more than 8 bits] with high speed [60MHz and above] and good dynamic performance is a challenging tasks.

The design of pipeline ADC can be considered more difficult than the the design of C-DAC.

To make sure than you complete your thesis in time and handle a challenging task, C-DAC is the best option.

I hope I could be of some help.

 

[maharshi_qis]

LV pipelined DAC is commonly used due 2 less power and high speed..

 

[Yahia Muhammad]

well i think

Low-jitter Digital PLL/DLL Clock generator
or
High-speed Current-steering DAC