Hello everyone,
I am a freshman in AIC/MSIC field.
My advisor professor gave me a list.
There are so different architectures about ADC/DAC.
I don't know which one is better for my career,thesis,etc.
Please give me some suggestions.
Thanks in advance.
List:
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1.Low-voltage(1.2V)10-bit pipelined ADC
2.High-speed Low-power 6-bit ADC
3.High-speed Current-steering DAC
4.Low-jitter Digital PLL/DLL Clock generator
5.System in package and capacitor matching experiment
6.Temperature Sensor and Fingerprint Sensor
It seems that ADC is more difficult than DAC
and current-steering DAC is just part of some
ADC architectures.
I mean,
if I choose a difficult one,maybe it will take me more time to finish my thesis;
On the other hand,
If I choose a easy one,maybe it will do harm to my career.
Do I worry too much?
By the way,pipeline ADC seems to be the hottest
ADC architecture.
I would suggest the Current Steering DAC. The current steering DAC is not always a part of other ADC architectures. Designing high resolution C-DAC [more than 8 bits] with high speed [60MHz and above] and good dynamic performance is a challenging tasks.
The design of pipeline ADC can be considered more difficult than the the design of C-DAC.
To make sure than you complete your thesis in time and handle a challenging task, C-DAC is the best option.