Thank you @erikl for your helpful answer, I would be appreciate if you (or any other gentleman or lady that is reading this, thanks to my honor) tell me somethings additionally,
After compensation of unity gain buffer to our desired phase margin is it important to be sensitive about the destiny of the shape of the phase diagram in higher frequencies than Wta? for example if we have Wta=600Mhz does it matters that phase diagram is rising for example at 2GHz(unstable at higher frequencies)? I just like to know.
Also for best performance I've considered 60 degree of phase margin, do we have agreement about this choice?
I have third question after all that I'm not proud of asking that, for compensation I've used CL=0.11p, i just am confused when i use the OTA in my general circuit as a black box and using for example 1p load capacitance for S/H does this load capacitance have any effect on my compensation? Should I choose load capacitance due to that CL that i used in my OTA, I guess you figured out that how confuse am about what, would you please poke my observations.