Cyclone II is 90nm process as well, but not in production yet.
From https://www.altera.com/products/devices/cyclone2/overview/cy2-overview.html
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Altera® Cyclone™ II devices are designed on an all-layer-copper, low-k, 1.2-V SRAM process and are optimized for the smallest possible die size. Built on TSMC’s highly successful 90-nm process technology using 300-mm wafers, Cyclone II devices offer higher densities, more features, exceptional performance, and the benefits of programmable logic at ASIC prices. Cyclone II devices offer from 4,608 to 68,416 logic elements (LEs) and are designed with an optimal set of features, including embedded 18 x 18 multipliers, dedicated external memory interface circuitry, 4-kbit embedded memory blocks, phase-locked loops (PLLs), and high-speed differential I/O capabilities.
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Cyclone II has been announced because someone leaked the introduction of the EC/ECP product family of Lattice.
CycloneII will only be available in samples by 2H05. By that time the initial specs will be changed quite some bit. If you take in account that a total tape-out takes about 14-16 weeks, ALTR could do quite some design respins by then. So CII is not a real device to consider for designs yet.
Maybe this is true for LSCC too, but anyway, they have samples of a couple of their family - with other densities coming out soon (I have been told)
Considering one family above an other then comes to desired specs, knowledge of SW tools, price, ...
My guess is that the'll shot themself in the foot by being so slow! By the time, Xilinx will probably be well-established, and probably olso have moved to other products too (like Virtex 4).