When the FPGA is in SPI Master mode how does it take the data from the sPI Flash.
Usually SPI flash has commands access data in a specifica page/bank etc.
Hi;
If you mean boot from SPI (I mean your design is flashed in SPI and FPGA is configured by that SPI data)
FPGA has internal macros/hard coded SPI read/write functionalities. It is already put in FPGA by the manufacturer, you just need to configure bootstraps.
Hi;
If you mean boot from SPI (I mean your design is flashed in SPI and FPGA is configured by that SPI data)
FPGA has internal macros/hard coded SPI read/write functionalities. It is already put in FPGA by the manufacturer, you just need to configure bootstraps.
Does he? If so, hardware configuration load or booting a soft processor image? There are many ways to access a serial flash from an FPGA, the built-in configuration controller is one of them. Why we need to gues when hithesh123 can easily post a clear question?
I thought the FPGA would be doing a simple SPI read