The simple answer is: whenever the percentage of die defects due to SRAM failure becomes unnaceptable (this depends on project and target market/volume). Once you pick the ppm failure rate due to SRAMs bit cells/bit lines/word lines, given the defect density per mm^2 of SRAM (these are provided by your foundry) you can calculate how many redundant rows/columns you need to build in to hit your failure rate target.
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Also, redundancy selection bits are usually implemented using e-fuse bits, laser fuses are lots of money so it is tough for them to pay off vs. just letting the rams fail.