what's the relation of loop bandwidth and transient response performance in LDO

[xiazhihan418]

"Transient response of a LDO is related to design parameters such as closed loop stability, the loop bandwidth and the slew rate at the gate of power transistor."
SR relates with the speed of charging or discharging Cpar. But I am confused the relation between BW and TR.

 

[artmalik]

Transient Response is directly proportional to Bandwidth. Bandwidth can be simply defined as the highest frequency till the output=input. Every CMOS system is a low pass filter ie it will allow the low frequencies to go as it is but the higher frequency will be attenuated by a certain amount as dictated by the transfer function of the system. Frequencies get attenuated because the 1/jwC (w is the frequency) tends to reduce the impedance offered.

Transient response is for pulse with a certain rise time which means it has all the frequencies as a factor of 1/Tr(rise_time). So higher the BW more high frequencies will go to output undisturbed.

 

[xiazhihan418]

Transient Response is directly proportional to Bandwidth. Bandwidth can be simply defined as the highest frequency till the output=input. Every CMOS system is a low pass filter ie it will allow the low frequencies to go as it is but the higher frequency will be attenuated by a certain amount as dictated by the transfer function of the system. Frequencies get attenuated because the 1/jwC (w is the frequency) tends to reduce the impedance offered.

Transient response is for pulse with a certain rise time which means it has all the frequencies as a factor of 1/Tr(rise_time). So higher the BW more high frequencies will go to output undisturbed.

Thank you for your answer. But I am still confused. We always want transient response with fast recovery time and less amplitude of voltage spike in LDO. Higher the BW, except for the low frequencies, more high frequencies go to output. Will the output be more unstable with more oscillations?

 

[artmalik]

okay I think the answer was in general, focusing on the LDO itself. LDO in itself is a two pole system or can be higher depending upon the op-amp you are using. LDO is voltage sensing current source. actually in an LDO application you want to damp the response to get a stable output/current. The high bandwidth is useful as when the system is put in closed loop it has a stable response. The LDO is always compensated using internal cap or Cload.

if the response time is smaller then the LDO will be respond the changes in the load current quickly. You are trying manipulate the load current in an LDO.