Whats the reason for this violations in DC synthesis?

what's the reason?

i have run DC for synthesis
the following are the violations, what's the reason and what to do?
max_transition

Required Actual
Net Transition Transition Slack
-----------------------------------------------------------------
mcu_rclk_pd (dont_touch) 4.50 79.55 -75.05 (VIOLATED)
mcu_wclk_pd (dont_touch) 4.50 79.55 -75.05 (VIOLATED)
rx_bit_pd 4.50 79.20 -74.70 (VIOLATED)
rx_clk_pd 4.50 79.20 -74.70 (VIOLATED)
test_pd 4.50 79.20 -74.70 (VIOLATED)
tx_begin_pd 4.50 79.20 -74.70 (VIOLATED)
tx_end_pd 4.50 79.20 -74.70 (VIOLATED)
tx_type_pd 4.50 79.20 -74.70 (VIOLATED)
wdata_pd[0] 4.50 79.20 -74.70 (VIOLATED)
wdata_pd[1] 4.50 79.20 -74.70 (VIOLATED)
wdata_pd[2] 4.50 79.20 -74.70 (VIOLATED)
wdata_pd[3] 4.50 79.20 -74.70 (VIOLATED)
wdata_pd[4] 4.50 79.20 -74.70 (VIOLATED)
wdata_pd[5] 4.50 79.20 -74.70 (VIOLATED)
wdata_pd[6] 4.50 79.20 -74.70 (VIOLATED)
wdata_pd[7] 4.50 79.20 -74.70 (VIOLATED)


max_capacitance

Required Actual
Net Capacitance Capacitance Slack
-----------------------------------------------------------------
mcu_rclk_pd (dont_touch) 0.31 5.53 -5.22 (VIOLATED)
mcu_wclk_pd (dont_touch) 0.31 5.53 -5.22 (VIOLATED)
rx_bit_pd 0.31 5.51 -5.19 (VIOLATED)
rx_clk_pd 0.31 5.51 -5.19 (VIOLATED)
test_pd 0.31 5.51 -5.19 (VIOLATED)
tx_begin_pd 0.31 5.51 -5.19 (VIOLATED)
tx_end_pd 0.31 5.51 -5.19 (VIOLATED)
tx_type_pd 0.31 5.51 -5.19 (VIOLATED)
wdata_pd[0] 0.31 5.51 -5.19 (VIOLATED)
wdata_pd[1] 0.31 5.51 -5.19 (VIOLATED)
wdata_pd[2] 0.31 5.51 -5.19 (VIOLATED)
wdata_pd[3] 0.31 5.51 -5.19 (VIOLATED)
wdata_pd[4] 0.31 5.51 -5.19 (VIOLATED)
wdata_pd[5] 0.31 5.51 -5.19 (VIOLATED)

what's the reason?

check if there is any constraint that prevent DC from insert buffer to solve these violation?

Re: what's the reason?

have you add pads?
if you have not added pads, don't set load of output port too big.

Re: what's the reason?

Using the following constrain to insert BUF and try again

set_load 5 [all_outputs]
set_max_fanout 3

good luck