what's the maximum pratical value for poly resistor

[jeffben]

Hi everyone
I am using IBM cmos10lpe 65nm process. In some low frequency circuits, I need relatively large resistor (>500k) for the bias resistors. The sheet resistance of p+ poly resistor in this process is about 660 om/square.

I feel it is very easy to make a poly resistor of 500k or 600k, even 1M while not taking up too much area. However, someone told me that because the substrate is also p type. The current would also go through the substrate. Therefore the actual resistance should be the parallel result of poly resistor itself and the substrate resistance. is that true? If this is true, then I will never be able to make a large resistor, say 1M.

Can anyone kindly answer my question or tell me the substrate sheet resistance for this process. Thank you in advance!

Jeff [/b]

 

[keith1200rs]

I don't know the process you are talking about, but a P+ poly resistor will not be connected to the substrate. A p+ diffusion resistor would have leakage to substrate. Even a poly resistor will have some leakage but it should be very small.

I don't think I have used more than 200k ohms, but I have seen resistors of around 2000 squares in some designs (around 2M ohms depending on the process). Provided you can live with the capacitance I cannot see a problem with it.

Keith.

 

[rubink]

If you are making a large RC time constant with gate capacitance as the C don't forget that sub 0.18um generation thin oxides can have significant leakage so there will be IR drop across a large R. Got burnt by this when a foundry default model didn't include gate leakage.

 

[jeffben]

Thanks a lot!