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for the floorplanning, each functional block of a circuit is placed/auto placed from block to block within a cell (specified by a designer) , while for the layout, circuit is implemented in more physical (semiconductor) level than the floorplanning, for example,layout the circuit by adding n well, polysilicon, metal lines and so on.
In summary, floorplanning for placing functional blocks of a circuit (system level); layout like routing lines within these functional blocks (physical level).
Virtuoso® Analog Design Environment is the analog design and simulation environment for the Virtuoso custom design platform. It is the industry's standard task-based environment for simulating and analyzing full-custom, analog, and RF IC designs. Virtuoso Analog Design Environment features a graphic user interface, integrated waveform display and analysis, distributed processing, and interfaces to popular third-party simulators.
Chip Editor is the center piece of the full-chip integration component of the Virtuoso custom design platform. It provides high-performance editing for full-chip finishing tasks and the capacity to handle your largest designs. It is fully interoperable with Encounter™ digital IC design platform and leverages the industry-standard Virtuoso Layout Editor environment and infrastructure for layout productivity when you need it most—at tape out.
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