What's the difference between RAM and ROM with a coe files in Xilinx FPGA?

[kevinwang65]

Hello,

I am using a RAM ip in XLINUX FPGA. When I change the context of the COE file in the RAM, I found the bit file didn't change.

I am wondering what's the difference between RAM and ROM with a coe files?

I am guessing if I am using a ROM ip with a coe file, the bit file will be changed if I change the coe file. However, if I am using a RAM ip , the bit file will keep the same even I change the coe file.
Is that right? Thanks.


Kevin

 

[barry]

In the FPGA ROM is really just RAM with no write capability. The coe file (embedded in the bit file) is used to initialize the RAM (ROM). Similarly, the coe file is also used for initializing RAM.

I'm not sure why your bitfile didn't change when you changed the coe file. Are you sure you've configured the IP correctly to actually USE the coe file? You need to enable the "load init file" option in the IP configuration screen

 

[Akanimo]

Hi,

In reality, it is either a memory has random access (RAM) capability or sequential access (SAM) capability. A ROM (read-only memories) can be either RAM or SAM depending on access capability. With the FPGA, the ROMs are random access memories that cannot be written to. What is called RAM in layman terms is read-write memory.

I don't know about the Xilinx IP and the associated file but here is a possibility why your expectation of the IP may not correspond with what it actually is.

 

[kevinwang65]

In the FPGA ROM is really just RAM with no write capability. The coe file (embedded in the bit file) is used to initialize the RAM (ROM). Similarly, the coe file is also used for initializing RAM.

I'm not sure why your bitfile didn't change when you changed the coe file. Are you sure you've configured the IP correctly to actually USE the coe file? You need to enable the "load init file" option in the IP configuration screen

YES. I enabled the "loaded the initial files". I did change the size of the RAM and changed the coe file. But the bit files didn't change. Any idea? Thanks.

--- Updated Mar 11, 2024 ---

YES. I enabled the "loaded the initial files". I did change the size of the RAM and changed the coe file. But the bit files didn't change. Any idea? Thanks.

Sorry. I was wrong. The bit files did change but the bin files are the same. However, the bit files only change one location(please see the picture)

 

[barry]

Looks like more than one location changed.

Maybe your coe files are nearly the same? have you compared them?

the bin file is just a binary version of the text bit file. If the bit file changed, so should the bin. Have you set up your project to generate both files? Check the timestamp of the files.

 

[kevinwang65]

My two coe files are different even size. Please check them.

 

[FvM]

I don't completely get your question. Did you experience malfunction of memory initialization? If not, expect that it works both for RAM and ROM.

 

[kevinwang65]

My question is why the bit files didn't change when I changed the coe files. I thought that was because I was using RAM not ROM. However, Barry told me RAM and ROM should both keep the initial coe files in the bit files. Thanks

 

[barry]

Please pay attention to what you write. You just said "the bit files didn't change." I assume you meant BIN file.

But let me ask an obvious question: how do you know your bin file didn't change? Again, did you check the time stamp of the file? That would at least tell you if a new file is even being generated.

 

[kevinwang65]

Sorry. I mean BIN file. I compared two BIN files. The timestamp is different but the content is the same.

 

[barry]

so, let’s get this straight:
You have a coe file. You compile the project and generate a bin and bit file. then you use a different coe file, compile the project and the bit file is different from the first one, but the bin file isn’t different. Is that correct? does the coe file have the same name both times? do you regenerate the IP (memory)?

Doesn’t make sense.

 

[kevinwang65]

The bit file is different at one location. I tried to use the same name or a different name on the coe file but the result didn't change. I tried "Re-customize IP", "Re-Generate Output Products" and "Reset Output Product" but didn't change.

 

[kevinwang65]

It really makes me crazy. I compared two projects. The databases are all different, including VDI, DCP, and PD (I don't know what they mean), but the BIN is the same.

 

[ads-ee]

I can explain why the bit files are different. The bit file contains a header that has timestamps in it, so just running bitgen again will give you a different bit file, but will give you the same bin file.

Are you sure that you don't have an error somewhere and the bin file is just being generated from an existing checkpoint? Without a lot of detailed information on the project it will be difficult to help debug this.