Jan 17, 2007 #1 K kunal1514 Full Member level 1 Joined Dec 13, 2006 Messages 98 Helped 0 Reputation 0 Reaction score 0 Trophy points 1,286 Activity points 2,027 Hi All, can anybody tell me wht's the difference between "caseX" and "caseZ" in verilog. Also priority casez(a) 3’b00?: $display("0 or 1"); //LINE -1 3’b0??: $display("2 or 3"); //LINE -2 default: $display("4 to 7"); endcase what does the line "1" and line "2" explains
Hi All, can anybody tell me wht's the difference between "caseX" and "caseZ" in verilog. Also priority casez(a) 3’b00?: $display("0 or 1"); //LINE -1 3’b0??: $display("2 or 3"); //LINE -2 default: $display("4 to 7"); endcase what does the line "1" and line "2" explains
Jan 17, 2007 #2 V vinod_g Member level 4 Joined Nov 29, 2006 Messages 71 Helped 8 Reputation 16 Reaction score 2 Trophy points 1,288 Activity points 1,681 casez verilog case statement compares 1,0,x,z ... .......So in case of casez it treats all the values of z or which can also represented by ? as don't cares. .......in case of casex it treats all the values of 'x' and 'z' as donot cares
casez verilog case statement compares 1,0,x,z ... .......So in case of casez it treats all the values of z or which can also represented by ? as don't cares. .......in case of casex it treats all the values of 'x' and 'z' as donot cares
Jan 18, 2007 #3 P pra Member level 5 Joined Jan 8, 2005 Messages 85 Helped 6 Reputation 12 Reaction score 2 Trophy points 1,288 Activity points 672 verilog casex for casez = it treats Z as don't care for casex - it treats X n Z as don't care. In ur code! Line 1- LSB bit is don't care Line 2- 1:0 bits r don't care lets take an example if a is 010 it displays 2or3 if a is 00x it displays 0or1 if a is 0zx it displays 0or1
verilog casex for casez = it treats Z as don't care for casex - it treats X n Z as don't care. In ur code! Line 1- LSB bit is don't care Line 2- 1:0 bits r don't care lets take an example if a is 010 it displays 2or3 if a is 00x it displays 0or1 if a is 0zx it displays 0or1