what's settling time?

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ry257

Newbie level 3
hi,all

who can tell me "what is settling time in opamp"?
"and the relation in settling time,SR,GW,PH."
by the way ,where can i find a detailed introduction on the internet?

meanwhile ,i am designing an opamp that is used in a sigma-delta ADC.and the demanding settling time is 50n.But i am not quite clear about this concept.

cliffj

Member level 3
Time for your opamp to settle down within a specified output range(accuracy), usually within 0.1% error. You can refer to the attached document

lautouching

Newbie level 3
read the book by allen in chapter 6

vlsi_iitkgp

Newbie level 2
ry257 said:
hi,all

who can tell me "what is settling time in opamp"?
"and the relation in settling time,SR,GW,PH."
by the way ,where can i find a detailed introduction on the internet?

meanwhile ,i am designing an opamp that is used in a sigma-delta ADC.and the demanding settling time is 50n.But i am not quite clear about this concept.

Settling time is minimum time an opamp takes to settle down the output (to a % accuracy) after a step response (usually) is input.

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