Hai everyone,
I have a doubt in biasing a PMOS transistor. For a PMOS transistor, the condition for saturation region is Vgs < Vt and Vds < Vgs - Vt. If Vds is 0.6 V, Vt is -0.2 V, then what should be the Vgs ? as per the condition, it should be negative. if we apply negative voltage, then how the second condition will be satisfied?? What will be the biasing voltage for PMOS acting in saturation region?
If you have the Gate and Drain of a PMOS grounded and the source at a higher voltage, then it is just a diode connected PMOS which would be in saturation.
If the voltages satisfy the conditions for saturation then it would be in saturation, no matter whether the gate is grounded or not.