For Analog: not much, only Hspice for simulation
For Digital: depends on you design methodology i can say everything. like a kid to pick some candy in a candy store.
Also I want to know the compelete flow for ordinary designs and tools?
What is the start point and end point? Is the ouput of tools GDSII or more post processing is needed?
please ref
**broken link removed**
I use
digital : vcs for verilog simulation
design compiler for synthesis
primetime for STA
physical compiler for physical prototype planning
analog : hspice for analog block
nanosim for mixed soc simulation
soc : ECS or cohesion for SOC Chip ..
..
hope this help ...
Not the goal, but Synopsys' product can not compete with Cadence and Mentors Graphics in Schematic capture , Layout and PCB design. I don't know any product of Synopsys have RF capability.