Continue to Site

Welcome to

Welcome to our site! is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

What tools are necessary for Synopsys Analog/Digital Design?

Not open for further replies.


Junior Member level 1
Feb 6, 2003
Reaction score
Trophy points
Activity points
Syn@psys Design Flow

For Analog Design and Digitial Design With Syn@psys what tools are needed?

For Analog: not much, only Hspice for simulation
For Digital: depends on you design methodology i can say everything. like a kid to pick some candy in a candy store.

Saber support mix-signal simulation.
Who has runed the tools?
Would you share the experience?

I know the address of them, but the site of Syn@psys is very compilcated.
Can I say that the goal of Syn@psys tools is degital Design?

Also I want to know the compelete flow for ordinary designs and tools?
What is the start point and end point? Is the ouput of tools GDSII or more post processing is needed?

Every kind of design have its own methodological. No common flow for any design.

The point is you have understand what are you doing for before ask anything.

I have experience with Saber.
Is fine, lot of libraries. Easy to use.

But seems to be a dying software.
It changed hands from Anology to Ba??? to Synopsis.
Not much info about Saber at Synopsis site.

If you could get a _demo_ version, it is worth it.

Saber is a great tools for mixed signal design. However, it is too expensive for most of the company. Therefore, it is not widely used in the market.

Actually, I happy with it have winnt version.

Syn@psys Design Flow

please ref
**broken link removed**
I use
digital : vcs for verilog simulation
design compiler for synthesis
primetime for STA
physical compiler for physical prototype planning
analog : hspice for analog block
nanosim for mixed soc simulation
soc : ECS or cohesion for SOC Chip ..
hope this help ...

synopsys flow

Someone can give info the detail design flow from front end to backend!

zhustudio said:

What are these? Junk! They come to have a demo in our company and we kicked them out in 10 minutes.

PowerEDA2003 said:
Can I say that the goal of Syn@psys tools is degital Design?
Not the goal, but Synopsys' product can not compete with Cadence and Mentors Graphics in Schematic capture , Layout and PCB design. I don't know any product of Synopsys have RF capability.

Not open for further replies.

Part and Inventory Search

Welcome to