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What to verify in a divider used in PLL systems?

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IBO

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Hi


what else can be verified other than division ratio and jitter requirements for a divider used in a PLL system.


thanks
 

Re: divider

Hi,
I think these are all you need to get
bets regards,
Rania
 

Re: divider

You can also look at the minimum and maximum input voltage that your divider can handle before it stops dividing properly. In addition, you can also change the input rise/fall times to see what the maximum rise/fall time your divider can handle before it starts failing jitter spec or stops dividing properly. In relation to your jitter, you can simulate phase noise and get a print out of what your dominant noise sources will be in your divider design.
 

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