I AM CONDUCTING FPGA LABS AT A UNIVERSITY,CAN SOMEONE TELL ME WHAT SHOULD BE THE COURSE OUTLINE...??LIKE WHAT SHOULD WE MAKE , BCD COUNTERS ETC????ANY SUGGESTIONS????
Typically is good to start discovering the tools ..
But depending on the HDL language that you wil be using is is better to show how to sysnthesize combinatorial and sequential logic mapping pins and other resources ..here you can show those basic elements .. But from the language PERSPECTIVE ..not as individual impelementations or solutions
State machines and their optimisation is also part of this LAB..