What must one revise for interview for senior FPGA design engineer position?

[matrixofdynamism]

Different companies have different approaches. However, for those that have gone through the interview process enough times, they can certainly give their 2c. So my question is, what is the correct way to get prepared for a senior FPGA design engineer interview? What topics must one revise? Certainly knowing about adders and timing analysis is just the tip of the iceberge.

 

[barry]

How about everything?

 

[dick_freebird]

By the time you deserve a "senior" title I would expect you to have accomplished design tasks for some years and to have demonstrated ability to self-educate as well as having taken advantage of any training offered by your employer, tech societies etc. in pursuit of technical advancement.

The more you can steer the conversation to highlight these, the better. Companies may shop on the basis of "specs on paper" but buy on an impression that you will "hit the ground running" and then run faster. Sell that smell while you're worrying about "gotcha questions".

 

[TrickyDicky]

Remember this is also a chance for you to interview the company too. What tools do they use? What is the verification strategy?

I've effectively turned down companies based on the interviews. In the worst case (about 10 years ago) when I asked what simulation tools they use the answer was "we don't do simulation because we don't want to pay for the tools. " I rejected their offer rather quick.

Also be aware of companies trying to recruit their way out of an unachievable contract. Not really a good sign of well run or organised company.

 

[dpaul]

In the worst case (about 10 years ago) when I asked what simulation tools they use the answer was "we don't do simulation because we don't want to pay for the tools. "

Really surprised to hear that there are companies who work/can work like this!