matrixofdynamism
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A design is required to read data from a USB 2.0 camera using a NIOS II or HPS in (Altera) FPGA, than output it to a DVI display.
Apparently, this setup is looking quite complicated. This is because USB will require me to use an operating system to deal with the USB stack or some other complex hard coded IP. Either way will make things too complex and I don't think that interfacing DVI will be that simple seeing that Altera has no DVI IP for their FPGAs. Since I need so many IPs and that will require much time and energy to sort out, I think this is a bad route.
Having understood this much I am wondering what would be the simplest way to demonstrate the principle that the FPGA can read from "a camera" and output the information to "a display unit"?
Apparently, this setup is looking quite complicated. This is because USB will require me to use an operating system to deal with the USB stack or some other complex hard coded IP. Either way will make things too complex and I don't think that interfacing DVI will be that simple seeing that Altera has no DVI IP for their FPGAs. Since I need so many IPs and that will require much time and energy to sort out, I think this is a bad route.
Having understood this much I am wondering what would be the simplest way to demonstrate the principle that the FPGA can read from "a camera" and output the information to "a display unit"?