rise time of SDRAM
No, I believe you are not thinking about how the signal really propagates. As a thought experiment, assume that we are driving out a triangle wave. At time t=0, the driving signal crosses v=0 and is ramping in a positive direction. Some time later the signal starts arriving at the load. What portion of the signal arrives first? Would we expect that the peak arrives first? No, the first thing to arrive is the first thing to be sent which is the linear ramp crossing through zero. Therefore, a signal cannot complete its transition while being propagated. Regardless of how long or short the line, it only arrives in tiny time slices exactly as it was sent. Now, it the line is NOT terminated in its characteristic impedance, or the line impedance changes abruptly during tranmission, then the result waveshape will be distorted.
If you can may the line very short compared to the rise time of the signal, then you can ignore some of the transmission line effects, but that is usually not practical.
To insure that data is captured correctly, SDRAM, DDR and DDR2 use a capture clock. It is only important that the sufficient setup and hold times exists between the data and this capture clock.
How do you assure the timing relationship between the data and the clock? By controlling the routing delays for the signals. Assume that the driver places the data and clock into the proper timing relationship. Then if both are routed on controlled impedance lines with the same delay, the signals will maintain the some phase at the receiving end.