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You should read the AMBA spec
Therefore if you do single transfers every one of them have the overhead of the address and control cycle. It's significantly slower than burst transfers, which have a single address control cycle followed by a burst of data.
The address and data cycles are overlapped, pipelined. The data cycle is also the address cycle of the next transfer.
See the following document: IHI0011A_AMBA_SPEC.pdf, AMBA Specification (Rev 2.0)
Chapter 3.4 Basic transfer
"This simple example demonstrates how the address and data phases of the transfer occur
during different clock periods. In fact, the address phase of any transfer occurs during
the data phase of the previous transfer. This overlapping of address and data is
fundamental to the pipelined nature of the bus and allows for high performance
operation, while still providing adequate time for a slave to provide the response to a
transfer."
See: Figure 3-5 Multiple transfers
One single transfer takes 2 bus cycles, but e.g. 4 single transfers take 5 bus cycles (not 8) due to the overlapping.
I still don't understand why the burst transfer is faster.