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[SOLVED] what is the meaning for CMOS inverter consumes zero static power?

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KerimF

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The word "static" here means that the inverter (in an IC if you like) is supposed to have a fixed input (low or high). In this case 'static' state, its circuit consumes a very little current to the point we can assume its value to be very close to zero. This means in turn that its power consumption (Vcc x Icc) is also almost zero.

Kerim
 
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liuyying

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For ideal case, why inverter consumes zero current??
inverter is make up of one pmos and one nmos....
for high input, the nmos 'on'; for low input, the pmos 'on'...
then, how come it dint consumes any static power????
 
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You are right... but the other is off and in series so it is as if both are off.

Of course, this power doesn't include what some external components may consume.
 
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I think you know that NMOS and PMOS are driven (at their input) by applying a voltage that, practically speaking, doesn't need to supply any current if fixed.
The MOS transistors in an inverter are designed so that each of them will be fully on or off when the input is fixed as low or high.
The ON state means that the equivalent resistance between the drain and source (the MOS channel) becomes very low (as a short circuit).
The OFF state means that the equivalent resistance between the drain and source (the MOS channel) becomes very high (as an open circuit).
If you look at the internal design of an inverter, you will notice that in every pair (of MOS transistors connected in series) between Vcc and ground (supply terminals) there is one transistor in the OFF state hence it cuts the path between Vcc and ground. The result is that all branches from Vcc to ground are cut when the input is fixed digitally (that is close to zero volt or Vcc).
Of course ZERO power here doesn't mean a perfect zero but a very low power as nW or uW.
 
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