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The reverse bias current through pn/np junections in p-mos and n-mos of an inverter is leakage current. Leakage current in each inverter connected together would be independent of each other.
in MOS we consider the gate current to be zero but it is not so..... the leakage of current through the gate is called gate leakage current... the gate leakage doesnt affect MOS circuits that much because it is very low in terms of value and also MOS is a voltage controlled current source....
Gate leakage is also comparable to sub threshold leakage in the DSM and VDSM.
as the thickness of the gate oxide is reduced to few atomic layers tunneling effect is increasing and the gate leakage has become quite an issue.
The thickness of gate oxide is restricted to 8 °A ( Armstrong).
gate leakage is a dominant feature in short channel transistors. u can say in 0.45 nm tech n below. this occurs due to the possibly shortening of drain and source region in a cmos inverter.
gate leakage is independent when it comes to connecting of two inverters.