RISC & CISC
RISC vs CISC – Architecture
RISC features
1.Fixed width instructions
2.Few formats of instructions
3.Load/Store Architecture
4.Large Register bank
5.Instructions are pipelinable
6.Hardwired instruction decode
7.Single cycle execution of instruction
power:A few hundreds of milliwatts
compute speed:200-520 Mega Hz
cost:dollars
environment:High Temp, Low EM Emissions
CISC:______________
1.Variable length instruction
2.Several formats of instructions
3.Memory values can be used as operands in instructions
4.Small Register Bank
5.Cannot pipeline instructions
6.Microcode ROMS instruction decoder
7.Multi cycle execution on instruction
power:many watts
cost:tens to hundread of dollaors
speed:2-5 Mhz
environmental:Needs Fans, FCC/CE approval an issue