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CTS is clock tree synthesis. Clock is an example high fanout net(HFN). We declare any signal such as reset or enable, which will be supplied to a lot of flops, as high fanout net during synthesis. Incase of clock, i think the tool understands that clock is a HFN and assumes its going to be updated in later part of the process with buffers of higher drive strength and treats it as an ideal net. So, my guess is, it need not be specified as a HFN.
scan enable is another example for High fanout net. Some of the P&R tools are intelligent enough to detect the high fanout nets during placement optimisation (based on the threshold given for no: of nets) and do HFN synthesis.
Most tools today understand the difference between HFN and clocks. Typically you can set the threshold of what is defined as an HFN, but the tool default is fine. HFN synthesis typically tries to me requirements like max cap, max slew, max fanout.