What is the difference between clock buffer and normal buffer?

[pratap_v]

what is the difference between clock buffer and normal buffer?
please dont tell me things like drive strengths...

 

[qingliliu]

Re: buffer problem

hehe, as far as i know ,the cell_rising and falling transition time of clock buffer is almost equal, but the normal buffer not. so we can get duty cycle of clock.

 

[yln2k2]

Re: buffer problem

Just to add one more , the diff delay should be min for all PVT corners ...


regards
yln

 

[vlsi_deepa]

Re: buffer problem

"Just to add one more , the diff delay should be min for all PVT corners ...


regards
yln"



Hi,

I cant get ur ans.Can u plz explain it.

Regards,
deepa

 

[vlsi_whiz]

Re: buffer problem

Clock buffers are specially designed buffers used for clock tree synthesis and clock routing. These buffers have equal rise and fall times so that both the clock edges have same slope and are equal. These buffers also have low delay and lesser parasitic capacitance so that the next buffer or logic does not load the buffer and cause the clock waveform slope to change.

 

[sumit_techkgp]

buffer problem

drive strengths of clock buffer are very high

 

[shiv_emf]

buffer problem

clock buffer are ideal for CTS !! specially designed to hav same rise n fall time ..
hence used in clock tree n more over sometimes normal buffers or inverters r used in CTS

 

[pratap_v]

Re: buffer problem

clock buffers have almost same rise and fall time and also less parasitics unless normal buffers used in data path.

 

[funster]

Re: buffer problem

generally, a clock buffer has almost equal rise and fall delay, that's a good

property for clocks. normal buffer's rise and fall delay differ much.

what is the difference between clock buffer and normal buffer?
please dont tell me things like drive strengths...