[SOLVED] What is the correct way to bias PMOS and NMOS cascodes

[diarmuid]

Hi guys,

When biasing a PMOS cascode, I always see it done using a PMOS diode i.e. PMOS diode connected to a current sink.
When biasing an NMOS cascode, I always see it done using an NMOS diode i.e. NMOS diode connected to a current source.

What would be the implications if I mixed up the above ... say bias a PMOS cascode using a diode connected NMOS or
vice versa?

Thanks,

Diarmuid

 

[SIDDHARTHA HAZRA]

Hi dirmuid,

Generation of a voltage some how is not the only purpose of a bias circuit.
Imagine a scenario where a PMOS diode connect is used to generate a NMOS current sink. The gate potential of the PMOS will be adjusted based on the current flowing and the source potential (generally VDD). But for a NMOS that should be with respect to the VSS. You may size the PMOS arbitrarily to generate a voltage suitable for the NMOS for the same amount of current to flow but across process corners there will be huge variations.
More over layout matching will not be possible.
That is why using same type of device to generate bias is the easiest solution.

Hope this helps ..

 

[leehying]

Diarmuid,

Then the bias voltage will have larger variation over fs or sf corner.

It means in order to keep the non-cascode MOS in saturation, the output range will be narrower.

BR

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We are a team capable of power and battery management IC/IP design.
Mail leehying@163.com for more.

 

[diarmuid]

Thanks guys. Process variability makes sense.

Also worth mentioning that supply rejection will be worse if PMOS biases NMOS or vice versa.

Thanks,

Diarmuid