I think it's the same as SUBSTRATE TAPPING, i.e. providing low-ohmic connections from the substrate via a p+ region (in case of a p- substrate), contact to Metal_1 and a fully metal wire connection to GND (gnd!), not too far from all nMOS sources (these are the necessary nMOS body connections).
I think the UCLA EE115C - Tutorial 3 from Prof. Dejan Markovic (Winter 2007) explains it quite well. You can download it **broken link removed** via shashikumar.22's posting from Thu, 14 Jan 2010 12:24 (2.rar). Download & unzip it, then open it and scroll down until "Creating Substrate Contacts".