what is slave address for ADC121C021

[ansh11]

Hi

I have been gone through the datasheet ADC121C021 https://www.ti.com/lit/ds/symlink/adc121c021.pdf

there is table slave address , page 25 of datasheet, there are multiple slave address so i do not understand why there is multiple slave address, I looked some source code so there is given ADC121C021 I2C address is 0x50(80) link https://github.com/ControlEverythingCommunity/ADC121C021/blob/master/C/ADC121C021.c

I do not understand Why 0x50(80) is the address of Slave, can somebody clear the doubts ?

 

[FvM]

Depending on the package, ADC121C021 has selectable address or not:

For the VSSOP version of the ADC121C021, this address is configured by the ADR0 and ADR1 addres selection inputs. For the ADC121C027, the address is configured by the ADR0 address selection input. ADR0 and ADR1 can be grounded, left floating, or tied to VA. If desired, ADR0 and ADR1 can be set to VA/2 rather than left floating. The state of these inputs sets the hardware address that the ADC responds to on the I2C bus (see Table 1). For the ADC121C021, the hardware address is not pin-configurable and is set to 1010100.

Which do you have?

 

[ansh11]

Depending on the package, ADC121C021 has selectable address or not:


Which do you have?

I am just trying to understand datasheet I don't have any hardware in hand I am looking for version given in the source code. Why 0x50(80) is the address of Slave?

 

[FvM]

As you see in the datasheet, address 0x50 is achieved with VSSOP version of ADC121C021 by leaving both ADR pins open (floating).

 

[ansh11]

As you see in the datasheet, address 0x50 is achieved with VSSOP version of ADC121C021 by leaving both ADR pins open (floating).

Slave Address to write data
[A7 - A0] = 0x50 = 0b0101 0000

Slave Address to write data
[A7 - A0] = 0xD0 = 0b1101 0000

Configuration Register
[D0 to D7] = 0x02 = 0b00000010

Writing to an ADC Register page 29, figure 33(a)

what would be sequence to Writing data to an ADC Register?

Send Frame 1 that is slave address = 0x50
send frame 2 that is configuration register = 0x02
next is Frame 3

What would be the value of frame 3 in figure 33 (a)?

 

[FvM]

what would be sequence to Writing data to an ADC Register?

Send Frame 1 that is slave address = 0x50
send frame 2 that is configuration register = 0x02
next is Frame 3

Correct.

What would be the value of frame 3 in figure 33 (a)?

The new value of the configuration register.

 

[ansh11]

Correct.


The new value of the configuration register.

sorry I didn't understand

Frame 1 = 0x50
Frame 2 = 0x02
Frame 3 = ?

I know only two frames so what would be frame 3. Can you show in the digit as I am showing for frame 1 and frame 2

 

[FvM]

Depends on which value you want to write to the configuration register. You didn't yet tell.

 

[ansh11]

Depends on which value you want to write to the configuration register. You didn't yet tell.

alright I want to write 0x20

Frame 1 = 0x50
Frame 2 = 0x02
Frame 3 = 0x20

Figure 34. (b) Typical Write to a 2-Byte ADC Register

This diagram has also been sent to Frame 4. but the size of configuration is only 8 bit and it can store only 8 bit value. I think frame 3 and frame 4 represent a 16 bit data value which is sent to the 16 bit long register

 

[FvM]

Right. 16-bit registers are written with two data bytes, configuration register with one.

 

[ansh11]

Right. 16-bit registers are written with two data bytes, configuration register with one.

Can you tell me what are frame 3 and frame 4 in this sample code ?

// Distributed with a free-will license.
// Use it any way you want, profit or free, provided it fits in the licenses of its associated works.
// ADC121C021
// This code is designed to work with the ADC121C021_I2CADC I2C Mini Module available from ControlEverything.com.
// https://www.controleverything.com/content/Analog-Digital-Converters?sku=ADC121C021_I2CADC#tabs-0-product_tabset-2

#include <stdio.h>
#include <stdlib.h>
#include <linux/i2c-dev.h>
#include <sys/ioctl.h>
#include <fcntl.h>

void main() 
{
	// Create I2C bus
	int file;
	char *bus = "/dev/i2c-1";
	if((file = open(bus, O_RDWR)) < 0) 
	{
		printf("Failed to open the bus. \n");
		exit(1);
	}
	// Get I2C device, ADC121C021 I2C address is 0x50(80)
	ioctl(file, I2C_SLAVE, 0x50);

	// Select configuration register(0x02)
	// Automatic conversion mode enabled(0x20)
	char config[2] = {0};
	config[0] = 0x02;
	config[1] = 0x20;
	write(file, config, 2);
	sleep(1);

	// Read 2 bytes of data from register(0x00)
	// raw_adc msb, raw_adc lsb
	char reg[1] = {0x00};
	write(file, reg, 1);
	char data[2] = {0};
	if(read(file, data, 2) != 2)
	{
		printf("Error : Input/Output Error \n");
	}
	else
	{
		// Convert the data to 12-bits
		int raw_adc = ((data[0] & 0x0F) * 256) + data[1];

		// Output data to screen
		printf("Digital Value of Analog Input : %d \n", raw_adc);
	}
}

 

[ansh11]

Right. 16-bit registers are written with two data bytes, configuration register with one.

The ADC121C021 has 8 internal data registers and one address pointer. Figure 24. Register Structure

Can I store data at any register or do I have to store data in a sequence like First have to write the data at the configuration register. And then store in other register

 

[KlausST]

Hi,

Can I store data at any register or do I have to store data in a sequence like First have to write the data at the configuration register. And then store in other register

If the datasheet does not clearly describe a function, then better not use it.

Indeed the datasheet is not clear with this.
It mentiones

For a single byte transfer, the master should generate a stop condition at this point. For a 2-byte write operation, the lower 8-bits are sent by the master. The ADC121C021 then ACKs the transfer, and the master either sends another pair of data bytes, generates a Repeated Start condition to read or write another register, or generates a Stop condition to end communication.

The datasheet nowhere mentiones automatic address increment ... thus - maybe you re-write the current register instead of the next register...

--> Start independent write operations.

Klaus

 

[ansh11]

Hi,


If the datasheet does not clearly describe a function, then better not use it.

Indeed the datasheet is not clear with this.
It mentiones

The datasheet nowhere mentiones automatic address increment ... thus - maybe you re-write the current register instead of the next register...

--> Start independent write operations.

Klaus

There are two parts in I2C communication, I2C Read and I2C Write

The ADC121C021 has 8 internal data registers and one address pointer. Figure 24. Register Structure, Which register of ADC I have to write the data to read the analog input and Which address of register I have to read the analog input

 

[KlausST]

Hi,

There are two parts in I2C communication, I2C Read and I2C Write

Yes. But what is your question?
In post#12 you talked about "write" ... thus I answered about "write"

The ADC121C021 has 8 internal data registers and one address pointer. Figure 24. Register Structure, Which register of ADC I have to write the data to read the analog input and Which address of register I have to read the analog input

I'm not sure I understand your question.
* The digital result of an ADConversion is called "conversion result"
* With the value of the "pointer" register you select one of the "data" registers.
* the address of the conversion result register is "0", thus you have to send "0" to the pointer register.

--> The complete and very detailed description to such an access is shown in Figure 30.

What is unclear with Figure 30?
....all SCK clocks come from master
* I2C START (initiated from master)
* I2C Slave address 7 bits + 1 WRITE bit (from master; master "writes" to the pointer register)
* ACK (from ADC)
* value of the pointer register, 8 bits (from master)
* ACK from ADC
* I2C REPEATED START ( from master; here a new I2C communication starts)
* I2C Slave address 7 bits + 1 READ bit (from master; master "reads" from the data register)
* ACK (from ADC)
* value of the first data byte, 8 bits (from ADC)
* ACK (from master)
* value of the second data byte, 8 bits (from ADC)
* NACK (from master, to initiate stopping of data transfer)
* I2C STOP (from master)

Klaus

 

[ansh11]

Hi,

Yes. But what is your question? I'm not sure I understand your question.

Klaus

Now I am trying to understand work of each register in sensor device. What is work of Configuration Register ? When should it be used?

 

[FvM]

I think, the purpose of all registers is well explained in datasheet. The ADC can be however operated without writing to any register, just using the default pointer value of 0 and conversion on demand by repeatedly reading the result register.

 

[ansh11]

I think, the purpose of all registers is well explained in datasheet. The ADC can be however operated without writing to any register, just using the default pointer value of 0 and conversion on demand by repeatedly reading the result register.

There are not more details about the configuration register in the datasheet. Can you tell me how to configure configuration register to read the analog data?

 

[KlausST]

Hi,

There are not more details about the configuration register in the datasheet. Can you tell me how to configure configuration register to read the analog data?

There are ALL details given in the datasheet.
And this is where we have our knowledge from. .. Just from reading the datasheet. ( I´ve never heared of this IC before this thread. )

My question: Did you even try to read the conversion result?
* yes: What results did you get? What results did you expect?
* no: then read the conversion result...

Klaus

 

[ads-ee]

There are ALL details given in the datasheet.
And this is where we have our knowledge from. .. Just from reading the datasheet. ( I´ve never heared of this IC before this thread. )

All the configuration register bit definitions for the device are described in the datasheet that you posted in #1

My question: Did you even try to read the conversion result?
* yes: What results did you get? What results did you expect?
* no: then read the conversion result...

I am just trying to understand datasheet I don't have any hardware in hand I am looking for version given in the source code. Why 0x50(80) is the address of Slave?

They are doing this without hardware.