cmos means complementry MOSFET, and open drain means the output is drawn from drain terminal of mosfet. consider a mosfet withot VDD.here the drain is floating. this is called open drain. now if u want to use this drain as output, you have to pull it up connecting to VDD through a resistor.so now when the gate is active,current flows from drain to source leading to 0V at drain.in absence of gate, drain will be at VDD.
thanks for the reply!!
if i am getting you .. i think you mean to say in cmos drain of pmos tarnsitor is left open . Now when gate voltage is applied and if i want to use open drain terminal as output i need to connect an pull up ressitor between pmos dran and vddand then nmos wil drive the op to 0v.. .
but when gate voltage is not applied and pmos drain is in floatin state (not connected to vdd) how output wil b at logic 1 value?
You can short together open drain outputs and use a single pullup resistor. Then you have made an OR gate because the output goes low if one or the other Mosfet goes low.
An AND gate is more complicated because then the outputs are in series so that both must be low for their combined output to be low.