What is meant by snapback during breakdown of pn junction?

[ssankurathri]

snapback...

hi
what is meant by snapback during breakdown of pn junction. is it an advantage or not? if not how can we rectify that?
all suggestions are invited.
cheers
skr

 

[DenisMark]

snapback...

The term snapback used in ESD protection design. During ESD stress (HBM, MM, CDM) ESD protection device (parasitic bip. tr. if mosfet, SCR latch, not pn-junction ) begins to work in snapback region with low Ron resistance and pass high esd stress current throught with low voltage overshoot. So such device protect internal devices in IC. Read books about ESD protection to take advance.

 

[muiyuen]

Re: snapback...

This book offers a good explanation on the topic:

On-Chip ESD Protection for Integrated Circuits
by Albert Z. H. Wang

 

[analog_v]

snapback...

Snapback occurs in ESD protection devices...

**broken link removed**

see section 2 in the above paper for details