i am new to analog layouts? can anybody help what is the parasitics &how to reduce parasitics in analog layouts??
In general, "parasitics" are physical effects that have (usually) undesirable impact on circuit behavior and that are caused by circuit physical implementation (i.e. 3D structure, representing the circuit elements and their interconnections).
In physical implementation of ICs, the "nodes" - connection points between IC elements - are not discrete points, but 3D conducting objects, formed by metal wires and vias, that have non-zero resistance, capacitance (to other nets and to the ground), inductance (self- and mutual), etc.
Usually, parasitics can be classified into several groups:
1. resistance
2. capacitance
3. inductance
The order in which I placed these effects reflect their complexity (from low to high) - complexity to anticipate, predict, understand, simulate, analyze, and improve.
(1) Resistance is quite a local effect, where wire or via resistance does not depend on the presence or absence of neighboring wires and vias (this is not true for advanced technologies - such as 16nm, 10nm, 7nm, etc., and even at 20nm, 28nm, 40nm, 65nm technology nodes - where scaling and complexity of process manufacturing - lithography, etching, CMP, etc. make wire/via resistivity dependent on the "context" - i.e. the environment of the wires/vias).
Resistance of a piece of a wire can be simply calculated as R=rsh*L/W, where rsh is the sheet resistivity of the metal layer, L is the length, and W is the width.
Resistance of a via is R=rho*H/A, where rho
(2) Capacitance is a longer range effect, where electrostatic field between two nets (conductors) "couples" them, so that voltage applied to one net induces a voltage change and/or current and charge on coupled net.
However, electrostatic field is screened by neighboring nets, so capacitive coupling has a limited "range of action".
(3) In inductance (self- or mutual), magnetic field caused by a current in a wire or a loop couples to the current in another (or same) wire/loop, causing AC/transient voltage when current is changed in time.
There is no screening of the magnetic field in ICs, so this is the longest range effect, and everything is coupled to everything - most of these couplings are not important, but identifying which coupling are important (in an automated fashion) is not easy.
There may be other undesirable effects associated with the circuit operation and its physical realization - such as thermal, mechanical, chemical, etc. - but usually they are not referred to as "parasitics".
Regarding how to reduce parasitics - while basic steps are pretty straightforward (make the wire shorter and wider, for lower resistance, or shorter narrower for lower capacitance), there are a lot of trade-offs and constraints, and hence understanding and reduction of parasitics is an art.
Max