Re: what is JTAG
Four-pin (plus power/ground) interface designed to test connections between chips. Interface is serial (clocked via the TCK pin). Configuration is performed by manipulating a state machine one bit at a time (via TMS pin), then transferring one bit of data in and out per TCK clock (via TDI and TDO pins, respectively). Different instruction modes can be loaded to read the chip ID, sample input pins, drive (or float) output pins, manipulate chip functions, or bypass (pipe TDI to TDO to logically shorten chains of multiple chips). Operating frequency varies per chip, but is typically 10-100MHz TCK (10-100ns per bit time). K Kb Kilobits (Note that storage (RAM, disc) is usually measured in binary thousands, i.e., 1,024 bits.)