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What is Crss of this FET (ipa65r280e6)?

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..Datasheet does not say, Crss is needed to calculate the length of the miller plateau interval.

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Woops, sorry, info found in graph lower down in solved

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As you know, when investigating FET (turn ON) switching losses in offline flybacks, it is nice to be able to calculate the miller charge time, since for the duration of the miller plateau interval, the FET is in the linear region, and the energy dissipated is 0.5 x Vds(off) * I(pri_pedestal) * [duration of miller plateau].

The way to calculate the miller plateau interval, would be using dt = (C.dv)/I

dv = ds(off)
I = current from gate driver.
C = Crss = Cgd

However, “Crss” is highly variable as the voltage across it varies, the magnitude of Crss to be used in the above equation would be a research issue.

Given that we are using the FET IP65R280E6, what value would you use for the value of “Crss” in the above equation?
Page 12 of the datasheet gives the value of Crss in relation to the voltage across it, but as you can see, it varies over several orders as Vds varies down to zero volts

IP65R280E6 datasheet:

You'll preferably use effective Crss numbers that can be derived from the gate charge diagram.

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