normally synthesis tools wont synthesize memories, if your design contains a memory block then you should keep srams blocks in the place of it. If those sram macro blocks are not available the you will black box or commented out in your RTL and perform synthesis. now the synthesis tool will consider this commented out memory block as a black box.
2. it is not to hide , for IP protection many follows rtl encryption.
3. in gui pane, that particular block is get locked or you can see in synthesis log file , if u double click a black box, it wont open further.
4.for GLS, gate level netlist simulation , every module definations needs to present .