A paramaterized Cell is a layout cell in which you can change the layout ( change the sizing ) by changing a parameter ( a variable ).
Typically, a design Kit will contain PCELLs of all transistors and passive elements. So, you do not need to draw your own transistor. You just insert a pcell with the device size and all you need to do is perform placement, matching and routing
you can get the pcells from the pdk (process design kit) of your process.
if you draw the cells manually, it is no longer p cell, but s-cell (standard cell).