Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Most memory bus set ups, require that a pin called "write" must be set for the duration of the writing process. With a write latch, the write control signal just pulses the "set" line and at the end of the writing process, then pulses the write "not set" line.
The SSs, just show an indeterminate time, the space between the Ss, can be of any time period.