V
Member level 3
input type
I am new in VHDL. I want to ask about the input type. What input type does the VHDL have?
I just know integer, std_logic, std_logic_vector, are there any more?
and also when i use these type? what i mean is e.g. std_logic_vector : for making array, std_logic : '0' and '1' .
Thanks a lot~
I am new in VHDL. I want to ask about the input type. What input type does the VHDL have?
I just know integer, std_logic, std_logic_vector, are there any more?
and also when i use these type? what i mean is e.g. std_logic_vector : for making array, std_logic : '0' and '1' .
Thanks a lot~