What input type does the VHDL have?

[V]

input type

I am new in VHDL. I want to ask about the input type. What input type does the VHDL have?

I just know integer, std_logic, std_logic_vector, are there any more?
and also when i use these type? what i mean is e.g. std_logic_vector : for making array, std_logic : '0' and '1' .

Thanks a lot~

 

[senthilkumar]

input type

first u go thru the good book of fpga and chdl programming

or go this site its have lot of documentation

https://www.xilinx.com/support/library.htm

https://www.altera.com/